CPU

CPU Scheduling Lab OS Visualizer

Educational model: one CPU, integer arrival/burst ticks, known CPU bursts, no I/O blocking, no dispatch overhead, and no multicore effects. The displayed “handoff” count includes direct process-to-process changes only. For Round Robin, this lab enqueues arrivals at a tick boundary before re-queueing a process whose quantum just expired. Interface styling loads Tailwind CSS from a CDN; the scheduling engine itself runs in the browser.
Speed
Time: 0
FCFS
Process-to-process handoffs: 0
CPU Idle: 0 ticks
CPU Core 1
CPU Idle
Executing tick slice -
Ready Queue (FIFO / Prioritized) 0 queued
No processes waiting in ready queue
Enters queue at process arrival time Head → Tail

Execution Gantt Timeline

Each block = one modeled CPU tick Idle

Process Set

Simulation Averages

Avg Waiting (WT):

0.0

Avg Turnaround (TAT):

0.0

Avg Response (RT):

0.0

CPU Utilization:

100%

Process Evaluation & Scheduling Metrics

Formula breakdown: Turnaround Time ($TAT = CT - AT$), Waiting Time ($WT = TAT - BT$), Response Time ($RT = First Exec - AT$)

Process Arrival Time (AT) CPU Burst (BT) Priority Completion (CT) Turnaround (TAT) Waiting Time (WT) Response Time (RT) Status
Educational single-CPU simulator. Tailwind CSS is loaded from a CDN for presentation, so first-load styling requires network access. Scheduling results are computed locally in this page and are not a model of a specific production operating-system scheduler.